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1 ltc1778/ltc1778-1 1778fb wide operating range, no r sense tm step-down controller no sense resistor required true current mode control optimized for high step-down ratios t on(min) 100ns extremely fast transient response stable with ceramic c out dual n-channel mosfet synchronous drive power good output voltage monitor (ltc1778) adjustable on-time (ltc1778-1) wide v in range: 4v to 36v 1% 0.8v voltage reference adjustable current limit adjustable switching frequency programmable soft-start output overvoltage protection optional short-circuit shutdown timer micropower shutdown: i q < 30 a available in a 16-pin narrow ssop package notebook and palmtop computers distributed power systems the ltc 1778 is a synchronous step-down switching regulator controller optimized for cpu power. the con- troller uses a valley current control architecture to deliver very low duty cycles with excellent transient response without requiring a sense resistor. operating frequency is selected by an external resistor and is compensated for variations in v in . discontinuous mode operation provides high efficiency operation at light loads. a forced continuous control pin reduces noise and rf interference, and can assist second- ary winding regulation by disabling discontinuous opera- tion when the main output is lightly loaded. fault protection is provided by internal foldback current limiting, an output overvoltage comparator and optional short-circuit shutdown timer. soft-start capability for sup- ply sequencing is accomplished using an external timing capacitor. the regulator current limit level is user program- mable. wide supply range allows operation from 4v to 36v at the input and from 0.8v up to (0.9)v in at the output. figure 1. high efficiency step-down converter efficiency vs load current + d b cmdsh-3 d1 b340a l1 1.8 h c vcc 4.7 f c in 10 f 50v 3 v in 5v to 28v v out 2.5v 10a + c out 180 f 4v 2 m2 si4874 1778 f01a m1 si4884 r on 1.4m ? c ss 0.1 f i on v in tg sw boost run/ss i th sgnd intv cc bg pgnd v fb pgood c b 0.22 f r c 20k ltc1778 c c 500pf r2 30.1k r1 14k load current (a) 0.01 efficiency (%) 80 90 1778 f01b 70 60 0.1 1 10 100 v in = 5v v out = 2.5v v in = 25v descriptio u features applicatio s u typical applicatio u , ltc and lt are registered trademarks of linear technology corporation. no r sense is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 5481178, 6100678, 6580258, 5847554, 6304066
2 ltc1778/ltc1778-1 1778fb input supply voltage (v in , i on )................. 36v to 0.3v boosted topside driver supply voltage (boost) ................................................... 42v to 0.3v sw voltage .................................................. 36v to 5v extv cc , (boost ?sw), run/ss, pgood voltages ....................................... 7v to 0.3v fcb, v on , v rng voltages .......... intv cc + 0.3v to 0.3v i th , v fb voltages...................................... 2.7v to 0.3v order part number ltc1778egn ltc1778ign t jmax = 125 c, ja = 130 c/ w absolute axi u rati gs w ww u package/order i for atio uu w gn part marking 1778 1778i tg, bg, intv cc , extv cc peak currents .................... 2a tg, bg, intv cc , extv cc rms currents .............. 50ma operating ambient temperature range (note 4) ltc1778e ........................................... 40 c to 85 c ltc1778i .......................................... 40 c to 125 c junction temperature (note 2) ............................ 125 c storage temperature range ................. 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c top view gn package 16-lead plastic ssop 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 run/ss pgood v rng fcb i th sgnd i on v fb boost tg sw pgnd bg intv cc v in extv cc order part number ltc1778egn-1 gn part marking 17781 top view gn package 16-lead plastic ssop 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 run/ss v on v rng fcb i th sgnd i on v fb boost tg sw pgnd bg intv cc v in extv cc the denotes specifications which apply over the full operating temperature range, otherwise specifications are t a = 25 c. v in = 15v unless otherwise noted. electrical characteristics symbol parameter conditions min typ max units main control loop i q input dc supply current normal 900 2000 a shutdown supply current 15 30 a v fb feedback reference voltage i th = 1.2v (note 3) ltc1778e 0.792 0.800 0.808 v i th = 1.2v (note 3) ltc1778i 0.792 0.800 0.812 v ? v fb(linereg) feedback voltage line regulation v in = 4v to 30v, i th = 1.2v (note 3) 0.002 %/v ? v fb(loadreg) feedback voltage load regulation i th = 0.5v to 1.9v (note 3) 0.05 0.3 % i fb feedback input current v fb = 0.8v 5 50 na g m(ea) error amplifier transconductance i th = 1.2v (note 3) 1.4 1.7 2 ms v fcb forced continuous threshold 0.76 0.8 0.84 v i fcb forced continuous pin current v fcb = 0.8v 1 2 a t on on-time i on = 30 a, v on = 0v (ltc1778-1) 198 233 268 ns i on = 15 a, v on = 0v (ltc1778-1) 396 466 536 ns t on(min) minimum on-time i on = 180 a 50 100 ns t jmax = 125 c, ja = 130 c/ w consult ltc marketing for parts specified with wider operating temperature ranges. (note 1)
3 ltc1778/ltc1778-1 1778fb the denotes specifications which apply over the full operating temperature range, otherwise specifications are t a = 25 c. v in = 15v unless otherwise noted. electrical characteristics note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: t j is calculated from the ambient temperature t a and power dissipation p d as follows: ltc1778e: t j = t a + (p d ?130 c/w) note 3: the ltc1778 is tested in a feedback loop that adjusts v fb to achieve a specified error amplifier output voltage (i th ). note 4: the ltc1778e is guaranteed to meet performance specifications from 0 c to 70 c. specifications over the ?0 c to 85 c operating temperature range are assured by design, characterization and correlation with statistical process controls. the ltc1778i is guaranteed over the full 40 c to 125 c operating temperature range. symbol parameter conditions min typ max units t off(min) minimum off-time i on = 30 a 250 400 ns v sense(max) maximum current sense threshold v rng = 1v, v fb = 0.76v 113 133 153 mv v pgnd ?v sw v rng = 0v, v fb = 0.76v 79 93 107 mv v rng = intv cc , v fb = 0.76v 158 186 214 mv v sense(min) minimum current sense threshold v rng = 1v, v fb = 0.84v 67 mv v pgnd ?v sw v rng = 0v, v fb = 0.84v 47 mv v rng = intv cc , v fb = 0.84v 93 mv ? v fb(ov) output overvoltage fault threshold 5.5 7.5 9.5 % v fb(uv) output undervoltage fault threshold 520 600 680 mv v run/ss(on) run pin start threshold 0.8 1.5 2 v v run/ss(le) run pin latchoff enable threshold run/ss pin rising 4 4.5 v v run/ss(lt) run pin latchoff threshold run/ss pin falling 3.5 4.2 v i run/ss(c) soft-start charge current v run/ss = 0v 0.5 1.2 3 a i run/ss(d) soft-start discharge current v run/ss = 4.5v, v fb = 0v 0.8 1.8 3 a v in(uvlo) undervoltage lockout v in falling 3.4 3.9 v v in(uvlor) undervoltage lockout release v in rising 3.5 4 v tg r up tg driver pull-up on resistance tg high 2 3 ? tg r down tg driver pull-down on resistance tg low 2 3 ? bg r up bg driver pull-up on resistance bg high 3 4 ? bg r down bg driver pull-down on resistance bg low 1 2 ? tg t r tg rise time c load = 3300pf 20 ns tg t f tg fall time c load = 3300pf 20 ns bg t r bg rise time c load = 3300pf 20 ns bg t f bg fall time c load = 3300pf 20 ns internal v cc regulator v intvcc internal v cc voltage 6v < v in < 30v, v extvcc = 4v 4.7 5 5.3 v ? v ldo(loadreg) internal v cc load regulation i cc = 0ma to 20ma, v extvcc = 4v 0.1 2% v extvcc extv cc switchover voltage i cc = 20ma, v extvcc rising 4.5 4.7 v ? v extvcc extv cc switch drop voltage i cc = 20ma, v extvcc = 5v 150 300 mv ? v extvcc(hys) extv cc switchover hysteresis 200 mv pgood output (ltc1778 only) ? v fbh pgood upper threshold v fb rising 5.5 7.5 9.5 % ? v fbl pgood lower threshold v fb falling 5.5 7.5 9.5 % ? v fb(hys) pgood hysteresis v fb returning 1 2 % v pgl pgood low voltage i pgood = 5ma 0.15 0.4 v
4 ltc1778/ltc1778-1 1778fb typical perfor a ce characteristics uw load current (a) 0.001 efficiency (%) 70 80 10 1778 g03 60 50 0.01 0.1 1 100 90 discontinuous mode continuous mode v in = 10v v out = 2.5v extv cc = 5v figure 9 circuit efficiency vs load current efficiency vs input voltage input voltage (v) 0 80 efficiency (%) 85 90 95 100 5101520 1778 g04 25 30 i load = 1a i load = 10a fcb = 5v figure 9 circuit frequency vs input voltage input voltage (v) 5 frequency (khz) 240 260 25 1778 g05 220 200 10 15 20 300 280 i out = 10a fcb = 0v figure 9 circuit i out = 0a load regulation load current (a) 0 ? v out (%) 0.2 0.1 8 1778 g06 0.3 0.4 2 4 6 10 0 figure 9 circuit i th voltage vs load current load current (a) 0 i th voltage (v) 1.0 1.5 1778 g07 0.5 0 5 10 15 2.5 2.0 continuous mode discontinuous mode figure 9 circuit transient response (discontinuous mode) transient response v out 50mv/div i l 5a/div 20 s/div 1778 g01 load step 0a to 10a v in = 15v v out = 2.5v fcb = 0v figure 9 circuit v out 50mv/div i l 5a/div 20 s/div 1778 g02 load step 1a to 10a v in = 15v v out = 2.5v fcb = intv cc figure 9 circuit start-up run/ss 2v/div i l 5a/div 50ms/div 1778 g19 v in = 15v v out = 2.5v r load = 0.25 ? v out 1v/div load current (a) 0 0 frequency (khz) 50 100 150 200 250 300 2468 1778 g26 10 continuous mode discontinuous mode frequency vs load current
5 ltc1778/ltc1778-1 1778fb typical perfor a ce characteristics uw maximum current sense threshold vs temperature maximum current sense threshold vs v rng voltage feedback reference voltage vs temperature v rng voltage (v) 0.5 0 maximum current sense threshold (mv) 50 100 150 200 300 0.75 1.0 1.25 1.5 1778 g10 1.75 2.0 250 temperature ( c) 50 ?5 100 maximum current sense threshold (mv) 120 150 0 50 75 1778 g11 110 140 130 25 100 125 v rng = 1v temperature ( c) ?0 0.78 feedback reference voltage (v) 0.79 0.80 0.81 0.82 25 0 25 50 1778 g12 75 100 125 current limit foldback v fb (v) 0 0 maximum current sense threshold (mv) 25 50 75 100 125 150 v rng = 1v 0.2 0.4 0.6 0.8 1778 g09 on-time vs i on current i on current ( a) 1 10 on-time (ns) 100 1k 10k 10 100 1778 g20 v von = 0v v on voltage (v) 0 on-time (ns) 400 600 1778 g21 200 0 1 2 3 1000 i ion = 30 a 800 temperature ( c) ?0 on-time (ns) 200 250 300 25 75 1778 g22 150 100 ?5 0 50 100 125 50 0 i ion = 30 a v von = 0v on-time vs v on voltage on-time vs temperature run/ss voltage (v) 1.5 0 maximum current sense threshold (mv) 25 50 75 100 125 150 v rng = 1v 2 2.5 3 3.5 1778 g23 maximum current sense threshold vs run/ss voltage current sense threshold vs i th voltage i th voltage (v) 0 200 current sense threshold (mv) 100 0 100 200 300 0.5 1.0 1.5 2.0 1778 g08 2.5 3.0 v rng = 1v 0.7v 0.5v 1.4v 2v
6 ltc1778/ltc1778-1 1778fb fcb pin current vs temperature run/ss pin current vs temperature run/ss latchoff thresholds vs temperature undervoltage lockout threshold vs temperature temperature ( c) ?0 fcb pin current ( a) 0.50 0.25 0 25 75 1778 g15 0.75 1.00 ?5 0 50 100 125 1.25 1.50 temperature ( c) 50 ?5 ? fcb pin current ( a) 0 3 0 50 75 1778 g16 ? 2 1 25 100 125 pull-up current pull-down current temperature ( c) ?0 3.0 run/ss threshold (v) 3.5 4.0 4.5 5.0 25 0 25 50 1778 g17 75 100 125 latchoff enable latchoff threshold temperature (c) ?0 2.0 undervoltage lockout threshold (v) 2.5 3.0 3.5 4.0 25 0 25 50 1778 g18 75 100 125 typical perfor a ce characteristics uw extv cc switch resistance vs temperature temperature ( c) 50 ?5 0 extv cc switch resistance ( ? ) 4 10 0 50 75 1778 g14 2 8 6 25 100 125 input voltage (v) 0 input current ( a) shutdown current ( a) 800 1000 1200 15 25 1778 g24 600 400 510 20 30 35 200 0 30 40 60 50 20 10 0 extv cc open extv cc = 5v shutdown intv cc load current (ma) 0 ? intv cc (%) 0.2 0.1 0 40 1778 g25 0.3 0.4 0.5 10 20 30 50 input and shutdown currents vs input voltage intv cc load regulation error amplifier g m vs temperature temperature ( c) 50 ?5 1.0 g m (ms) 1.4 2.0 0 50 75 1778 g13 1.2 1.8 1.6 25 100 125
7 ltc1778/ltc1778-1 1778fb uu u pi fu ctio s run/ss (pin 1): run control and soft-start input. a capacitor to ground at this pin sets the ramp time to full output current (approximately 3s/ f) and the time delay for overcurrent latchoff (see applications information). forcing this pin below 0.8v shuts down the device. pgood (pin 2, ltc1778): power good output. open drain logic output that is pulled to ground when the output voltage is not within 7.5% of the regulation point. v on (pin 2, ltc1778-1): on-time voltage input. voltage trip point for the on-time comparator. tying this pin to the output voltage or an external resistive divider from the output makes the on-time proportional to v out . the comparator input defaults to 0.7v when the pin is grounded or unavailable (ltc1778) and defaults to 2.4v when the pin is tied to intv cc . tie this pin to intv cc in high v out applications to use a lower r on value. v rng (pin 3): sense voltage range input. the voltage at this pin is ten times the nominal sense voltage at maxi- mum output current and can be set from 0.5v to 2v by a resistive divider from intv cc . the nominal sense voltage defaults to 70mv when this pin is tied to ground, 140mv when tied to intv cc . fcb (pin 4): forced continuous input. tie this pin to ground to force continuous synchronous operation at low load, to intv cc to enable discontinuous mode operation at low load or to a resistive divider from a secondary output when using a secondary winding. i th (pin 5): current control threshold and error amplifier compensation point. the current comparator threshold increases with this control voltage. the voltage ranges from 0v to 2.4v with 0.8v corresponding to zero sense voltage (zero current). sgnd (pin 6): signal ground. all small-signal compo- nents and compensation components should connect to this ground, which in turn connects to pgnd at one point. i on (pin 7): on-time current input. tie a resistor from v in to this pin to set the one-shot timer current and thereby set the switching frequency. v fb (pin 8): error amplifier feedback input. this pin connects the error amplifier input to an external resistive divider from v out . extv cc (pin 9): external v cc input. when extv cc ex- ceeds 4.7v, an internal switch connects this pin to intv cc and shuts down the internal regulator so that controller and gate drive power is drawn from extv cc . do not exceed 7v at this pin and ensure that extv cc < v in . v in (pin 10): main input supply. decouple this pin to pgnd with an rc filter (1 ? , 0.1 f). intv cc (pin 11): internal 5v regulator output. the driver and control circuits are powered from this voltage. de- couple this pin to power ground with a minimum of 4.7 f low esr tantalum capacitor. bg (pin 12): bottom gate drive. drives the gate of the bottom n-channel mosfet between ground and intv cc . pgnd (pin 13): power ground. connect this pin closely to the source of the bottom n-channel mosfet, the (? terminal of c vcc and the (? terminal of c in . sw (pin 14): switch node. the (? terminal of the boot- strap capacitor c b connects here. this pin swings from a diode voltage drop below ground up to v in . tg (pin 15): top gate drive. drives the top n-channel mosfet with a voltage swing equal to intv cc superim- posed on the switch node voltage sw. boost (pin 16): boosted floating driver supply. the (+) terminal of the bootstrap capacitor c b connects here. this pin swings from a diode voltage drop below intv cc up to v in + intv cc .
8 ltc1778/ltc1778-1 1778fb fu ctio al diagra u u w 1.4v 0.7v v rng 3 + + + + + + 7 i on v on ** 0.7v 2 2.4v 4 fcb 9 extv cc 10 v in 1 a r on v von i ion t on = (10pf) r sq 20k i cmp i rev q6 1v 3.3 a shdn switch logic bg on fcnt f 0.8v + 4.7v ov 1 240k q1 q2 q3 0.8v 0.6v 0.6v i th r c c c1 ea ss 0.8v ltc1778 ltc1778-1 * ** q4 + + 4 q5 5 run/ss c ss 1 1778 fd sgnd r2 r1 6 8 run shdn 12 pgnd 13 pgood* v fb intv cc 11 sw 14 tg c b v in c in 15 boost 16 + + uv 0.74v ov 0.86v c vcc v out m2 m1 l1 c out + 0.8v ref 5v reg 1.2 a 6v d b i thb 1 2
9 ltc1778/ltc1778-1 1778fb operatio u main control loop the ltc1778 is a current mode controller for dc/dc step-down converters. in normal operation, the top mosfet is turned on for a fixed interval determined by a one-shot timer ost. when the top mosfet is turned off, the bottom mosfet is turned on until the current com- parator i cmp trips, restarting the one-shot timer and initi- ating the next cycle. inductor current is determined by sensing the voltage between the pgnd and sw pins using the bottom mosfet on-resistance . the voltage on the i th pin sets the comparator threshold corresponding to in- ductor valley current. the error amplifier ea adjusts this voltage by comparing the feedback signal v fb from the output voltage with an internal 0.8v reference. if the load current increases, it causes a drop in the feedback voltage relative to the reference. the i th voltage then rises until the average inductor current again matches the load current. at low load currents, the inductor current can drop to zero and become negative. this is detected by current reversal comparator i rev which then shuts off m2, resulting in discontinuous operation. both switches will remain off with the output capacitor supplying the load current until the i th voltage rises above the zero current level (0.8v) to initiate another cycle. discontinuous mode operation is disabled by comparator f when the fcb pin is brought below 0.8v, forcing continuous synchronous operation. the operating frequency is determined implicitly by the top mosfet on-time and the duty cycle required to maintain regulation. the one-shot timer generates an on- time that is proportional to the ideal duty cycle, thus holding frequency approximately constant with changes in v in . the nominal frequency can be adjusted with an external resistor r on . overvoltage and undervoltage comparators ov and uv pull the pgood output low if the output feedback voltage exits a 7.5% window around the regulation point. furthermore, in an overvoltage condition, m1 is turned off and m2 is turned on and held on until the overvoltage condition clears. foldback current limiting is provided if the output is shorted to ground. as v fb drops, the buffered current threshold voltage i thb is pulled down by clamp q3 to a 1v level set by q4 and q6. this reduces the inductor valley current level to one sixth of its maximum value as v fb approaches 0v. pulling the run/ss pin low forces the controller into its shutdown state, turning off both m1 and m2. releasing the pin allows an internal 1.2 a current source to charge up an external soft-start capacitor c ss . when this voltage reaches 1.5v, the controller turns on and begins switch- ing, but with the i th voltage clamped at approximately 0.6v below the run/ss voltage. as c ss continues to charge, the soft-start current limit is removed. intv cc /extv cc power power for the top and bottom mosfet drivers and most of the internal controller circuitry is derived from the intv cc pin. the top mosfet driver is powered from a floating bootstrap capacitor c b . this capacitor is re- charged from intv cc through an external schottky diode d b when the top mosfet is turned off. when the extv cc pin is grounded, an internal 5v low dropout regulator supplies the intv cc power from v in . if extv cc rises above 4.7v, the internal regulator is turned off, and an internal switch connects extv cc to intv cc . this allows a high efficiency source connected to extv cc , such as an external 5v supply or a secondary output from the converter, to provide the intv cc power. voltages up to 7v can be applied to extv cc for additional gate drive. if the input voltage is low and intv cc drops below 3.5v, undervoltage lockout circuitry prevents the power switches from turning on.
10 ltc1778/ltc1778-1 1778fb applicatio s i for atio wu uu the basic ltc1778 application circuit is shown in figure 1. external component selection is primarily de- termined by the maximum load current and begins with the selection of the sense resistance and power mosfet switches. the ltc1778 uses the on-resistance of the synchronous power mosfet for determining the induc- tor current. the desired amount of ripple current and operating frequency largely determines the inductor value. finally, c in is selected for its ability to handle the large rms current into the converter and c out is chosen with low enough esr to meet the output voltage ripple and transient specification. choosing the ltc1778 or ltc1778-1 the ltc1778 has an open-drain pgood output that indicates when the output voltage is within 7.5 % of the regulation point. the ltc1778-1 trades the pgood pin for a v on pin that allows the on-time to be adjusted. tying the v on pin high results in lower values for r on which is useful in high v out applications. the v on pin also provides a means to adjust the on-time to maintain constant fre- quency operation in applications where v out changes and to correct minor frequency shifts with changes in load current. finally, the v on pin can be used to provide additional current limiting in positive-to-negative convert- ers and as a control input to synchronize the switching frequency with a phase locked loop. maximum sense voltage and v rng pin inductor current is determined by measuring the voltage across a sense resistance that appears between the pgnd and sw pins. the maximum sense voltage is set by the voltage applied to the v rng pin and is equal to approxi- mately (0.133)v rng . the current mode control loop will not allow the inductor current valleys to exceed (0.133)v rng /r sense . in practice, one should allow some margin for variations in the ltc1778 and external compo- nent values and a good guide for selecting the sense resistance is: r v i sense rng out max = 10 () an external resistive divider from intv cc can be used to set the voltage of the v rng pin between 0.5v and 2v resulting in nominal sense voltages of 50mv to 200mv. additionally, the v rng pin can be tied to sgnd or intv cc in which case the nominal sense voltage defaults to 70mv or 140mv, respectively. the maximum allowed sense voltage is about 1.33 times this nominal value. power mosfet selection the ltc1778 requires two external n-channel power mosfets, one for the top (main) switch and one for the bottom (synchronous) switch. important parameters for the power mosfets are the breakdown voltage v (br)dss , threshold voltage v (gs)th , on-resistance r ds(on) , reverse transfer capacitance c rss and maximum current i ds(max) . the gate drive voltage is set by the 5v intv cc supply. consequently, logic-level threshold mosfets must be used in ltc1778 applications. if the input voltage is expected to drop below 5v, then sub-logic level threshold mosfets should be considered. when the bottom mosfet is used as the current sense element, particular attention must be paid to its on- resistance. mosfet on-resistance is typically specified with a maximum value r ds(on)(max) at 25 c. in this case, additional margin is required to accommodate the rise in mosfet on-resistance with temperature: r r ds on max sense t ()( ) = the t term is a normalization factor (unity at 25 c) accounting for the significant variation in on-resistance figure 2. r ds(on) vs. temperature junction temperature ( c) ?0 t normalized on-resistance 1.0 1.5 150 1778 f02 0.5 0 0 50 100 2.0
11 ltc1778/ltc1778-1 1778fb applicatio s i for atio wu uu with temperature, typically about 0.4%/ c as shown in figure 2. for a maximum junction temperature of 100 c, using a value t = 1.3 is reasonable. the power dissipated by the top and bottom mosfets strongly depends upon their respective duty cycles and the load current. when the ltc1778 is operating in continuous mode, the duty cycles for the mosfets are: d v v d vv v top out in bot in out in = = the resulting power dissipation in the mosfets at maxi- mum output current are: p top = d top i out(max) 2 t(top) r ds(on)(max) + k v in 2 i out(max) c rss f p bot = d bot i out(max) 2 t(bot) r ds(on)(max) both mosfets have i 2 r losses and the top mosfet includes an additional term for transition losses, which are largest at high input voltages. the constant k = 1.7a ? can be used to estimate the amount of transition loss. the bottom mosfet losses are greatest when the bottom duty cycle is near 100%, during a short-circuit or at high input voltage. operating frequency the choice of operating frequency is a tradeoff between efficiency and component size. low frequency operation improves efficiency by reducing mosfet switching losses but requires larger inductance and/or capacitance in order to maintain low output ripple voltage. the operating frequency of ltc1778 applications is deter- mined implicitly by the one-shot timer that controls the on-time t on of the top mosfet switch. the on-time is set by the current into the i on pin and the voltage at the v on pin (ltc1778-1) according to: t v i pf on von ion = () 10 v on defaults to 0.7v in the ltc1778. tying a resistor r on from v in to the i on pin yields an on- time inversely proportional to v in . for a step-down con- verter, this results in approximately constant frequency operation as the input supply varies: f v vr pf h out von on z = () [] 10 to hold frequency constant during output voltage changes, tie the v on pin to v out or to a resistive divider from v out when v out > 2.4v. the v on pin has internal clamps that limit its input to the one-shot timer. if the pin is tied below 0.7v, the input to the one-shot is clamped at 0.7v. simi- larly, if the pin is tied above 2.4v, the input is clamped at 2.4v. in high v out applications, tying v on to intv cc so that the comparator input is 2.4v results in a lower value for r on . figures 3a and 3b show how r on relates to switching frequency for several common output voltages. r on (k ? ) 100 100 switching frequency (khz) 1000 1000 10000 1778 f03a v out = 3.3v v out = 1.5v v out = 2.5v r on (k ? ) 100 100 switching frequency (khz) 1000 1000 10000 1778 f03b v out = 3.3v v out = 12v v out = 5v figure 3a. switching frequency vs r on for the ltc1778 and ltc1778-1 (v on = 0v) figure 3b. switching frequency vs r on for the ltc1778-1 (v on = intv cc )
12 ltc1778/ltc1778-1 1778fb because the voltage at the i on pin is about 0.7v, the current into this pin is not exactly inversely proportional to v in , especially in applications with lower input voltages. to correct for this error, an additional resistor r on2 connected from the i on pin to the 5v intv cc supply will further stabilize the frequency. r v v r on on 2 5 07 = . changes in the load current magnitude will also cause frequency shift. parasitic resistance in the mosfet switches and inductor reduce the effective voltage across the inductance, resulting in increased duty cycle as the load current increases. by lengthening the on-time slightly as current increases, constant frequency operation can be maintained. this is accomplished with a resistive divider from the i th pin to the v on pin and v out . the values required will depend on the parasitic resistances in the specific application. a good starting point is to feed about 25% of the voltage change at the i th pin to the v on pin as shown in figure 4a. place capacitance on the v on pin to filter out the i th variations at the switching frequency. the resistor load on i th reduces the dc gain of the error amp and degrades load regulation, which can be avoided by using the pnp emitter follower of figure 4b. minimum off-time and dropout operation the minimum off-time t off(min) is the smallest amount of time that the ltc1778 is capable of turning on the bottom mosfet, tripping the current comparator and turning the mosfet back off. this time is generally about 250ns. the minimum off-time limit imposes a maximum duty cycle of t on /(t on + t off(min) ). if the maximum duty cycle is reached, due to a dropping input voltage for example, then the output will drop out of regulation. the minimum input voltage to avoid dropout is: vv tt t in min out on off min on () () = + a plot of maximum duty cycle vs frequency is shown in figure 5. inductor selection given the desired input and output voltages, the inductor value and operating frequency determine the ripple current: ? = ? ? ? ? ? ? ? ? ? ? ? ? ? i v fl v v l out out in 1 lower ripple current reduces core losses in the inductor, esr losses in the output capacitors and output voltage applicatio s i for atio wu uu c von 0.01 f r von2 100k r von1 30k c c v out r c (4a) (4b) v on i th ltc1778 c von 0.01 f r von2 10k q1 2n5087 r von1 3k 10k c c 1778 f04 v out intv cc r c v on i th ltc1778 figure 4. correcting frequency shift with load current changes 2.0 1.5 1.0 0.5 0 0 0.25 0.50 0.75 1778 f05 1.0 dropout region duty cycle (v out /v in ) switching frequency (mhz) figure 5. maximum switching frequency vs duty cycle
13 ltc1778/ltc1778-1 1778fb ripple. highest efficiency operation is obtained at low frequency with small ripple current. however, achieving this requires a large inductor. there is a tradeoff between component size, efficiency and operating frequency. a reasonable starting point is to choose a ripple current that is about 40% of i out(max) . the largest ripple current occurs at the highest v in . to guarantee that ripple current does not exceed a specified maximum, the inductance should be chosen according to: l v fi v v out lmax out in max = ? ? ? ? ? ? ? ? ? ? ? ? ? ? () () 1 once the value for l is known, the type of inductor must be selected. high efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite, molyper- malloy or kool m cores. a variety of inductors designed for high current, low voltage applications are available from manufacturers such as sumida, panasonic, coil- tronics, coilcraft and toko. schottky diode d1 selection the schottky diode d1 shown in figure 1 conducts during the dead time between the conduction of the power mosfet switches. it is intended to prevent the body diode of the bottom mosfet from turning on and storing charge during the dead time, which can cause a modest (about 1%) efficiency loss. the diode can be rated for about one half to one fifth of the full load current since it is on for only a fraction of the duty cycle. in order for the diode to be effective, the inductance between it and the bottom mos- fet must be as small as possible, mandating that these components be placed adjacently. the diode can be omit- ted if the efficiency loss is tolerable. c in and c out selection the input capacitance c in is required to filter the square wave current at the drain of the top mosfet. use a low esr capacitor sized to handle the maximum rms current. ii v v v v rms out max out in in out ? () ? this formula has a maximum at v in = 2v out , where i rms = i out(max) / 2. this simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to derate the capacitor. the selection of c out is primarily determined by the esr required to minimize voltage ripple and load step transients. the output ripple ? v out is approximately bounded by: ?? + ? ? ? ? ? ? v i esr fc out l out 1 8 since ? i l increases with input voltage, the output ripple is highest at maximum input voltage. typically, once the esr requirement is satisfied, the capacitance is adequate for filtering and has the necessary rms current rating. multiple capacitors placed in parallel may be needed to meet the esr and rms current handling requirements. dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. special polymer capacitors offer very low esr but have lower capacitance density than other types. tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. aluminum electrolytic capacitors have significantly higher esr, but can be used in cost-sensitive applications providing that consideration is given to ripple current ratings and long term reliability. ceramic capacitors have excellent low esr characteristics but can have a high voltage coefficient and audible piezoelectric effects. the high q of ceramic capacitors with trace inductance can also lead to signifi- cant ringing. when used as input capacitors, care must be taken to ensure that ringing from inrush currents and switching does not pose an overvoltage hazard to the power switches and controller. to dampen input voltage transients, add a small 5 f to 50 f aluminum electrolytic capacitor with an esr in the range of 0.5 ? to 2 ? . high performance through-hole capacitors may also be used, applicatio s i for atio wu uu kool m is a registered trademark of magnetics, inc.
14 ltc1778/ltc1778-1 1778fb but an additional ceramic capacitor in parallel is recom- mended to reduce the effect of their lead inductance. top mosfet driver supply (c b , d b ) an external bootstrap capacitor c b connected to the boost pin supplies the gate drive voltage for the topside mosfet. this capacitor is charged through diode d b from intv cc when the switch node is low. when the top mosfet turns on, the switch node rises to v in and the boost pin rises to approximately v in + intv cc . the boost capacitor needs to store about 100 times the gate charge required by the top mosfet. in most applications 0.1 f to 0.47 f, x5r or x7r dielectric capacitor is adequate. discontinuous mode operation and fcb pin the fcb pin determines whether the bottom mosfet remains on when current reverses in the inductor. tying this pin above its 0.8v threshold enables discontinuous operation where the bottom mosfet turns off when inductor current reverses. the load current at which current reverses and discontinuous operation begins de- pends on the amplitude of the inductor ripple current and will vary with changes in v in . tying the fcb pin below the 0.8v threshold forces continuous synchronous operation, allowing current to reverse at light loads and maintaining high frequency operation. in addition to providing a logic input to force continuous operation, the fcb pin provides a means to maintain a flyback winding output when the primary is operating in discontinuous mode. the secondary output v out2 is nor- mally set as shown in figure 6 by the turns ratio n of the transformer. however, if the controller goes into discon- tinuous mode and halts switching due to a light primary load current, then v out2 will droop. an external resistor divider from v out2 to the fcb pin sets a minimum voltage v out2(min) below which continuous operation is forced until v out2 has risen above its minimum. vv r r out min 2 08 1 4 3 () . =+ ? ? ? ? ? ? fault conditions: current limit and foldback the maximum inductor current is inherently limited in a current mode controller by the maximum sense voltage. in the ltc1778, the maximum sense voltage is controlled by the voltage on the v rng pin. with valley current control, the maximum sense voltage and the sense resistance determine the maximum allowed inductor valley current. the corresponding output current limit is: i v r i limit sns max ds on t l =+ ? () () 1 2 the current limit value should be checked to ensure that i limit(min) > i out(max) . the minimum value of current limit generally occurs with the largest v in at the highest ambi- ent temperature, conditions that cause the largest power loss in the converter. note that it is important to check for self-consistency between the assumed mosfet junction temperature and the resulting value of i limit which heats the mosfet switches. caution should be used when setting the current limit based upon the r ds(on) of the mosfets. the maximum current limit is determined by the minimum mosfet on- resistance. data sheets typically specify nominal and maximum values for r ds(on) , but not a minimum. a reasonable assumption is that the minimum r ds(on) lies the same amount below the typical value as the maximum lies above it. consult the mosfet manufacturer for further guidelines. to further limit current in the event of a short circuit to ground, the ltc1778 includes foldback current limiting. if the output falls by more than 25%, then the maximum sense voltage is progressively lowered to about one sixth of its full value. applicatio s i for atio wu uu figure 6. secondary output loop and extv cc connection v in ltc1778 sgnd fcb extv cc tg sw optional extv cc connection 5v < v out2 < 7v r3 r4 1778 f06 t1 1:n bg pgnd + c out2 1 f v out1 v out2 v in + c in 1n4148 + c out
15 ltc1778/ltc1778-1 1778fb intv cc regulator an internal p-channel low dropout regulator produces the 5v supply that powers the drivers and internal circuitry within the ltc1778. the intv cc pin can supply up to 50ma rms and must be bypassed to ground with a minimum of 4.7 f low esr tantalum capacitor. good bypassing is necessary to supply the high transient cur- rents required by the mosfet gate drivers. applications using large mosfets with a high input voltage and high frequency of operation may cause the ltc1778 to exceed its maximum junction temperature rating or rms current rating. most of the supply current drives the mosfet gates unless an external extv cc source is used. in con- tinuous mode operation, this current is i gatechg = f(q g(top) + q g(bot) ). the junction temperature can be estimated from the equations given in note 2 of the electrical characteristics. for example, the ltc1778cgn is limited to less than 14ma from a 30v supply: t j = 70 c + (14ma)(30v)(130 c/w) = 125 c for larger currents, consider using an external supply with the extv cc pin. extv cc connection the extv cc pin can be used to provide mosfet gate drive and control power from the output or another external source during normal operation. whenever the extv cc pin is above 4.7v the internal 5v regulator is shut off and an internal 50ma p-channel switch connects the extv cc pin to intv cc . intv cc power is supplied from extv cc until this pin drops below 4.5v. do not apply more than 7v to the extv cc pin and ensure that extv cc v in . the follow- ing list summarizes the possible connections for extv cc : 1. extv cc grounded. intv cc is always powered from the internal 5v regulator. 2. extv cc connected to an external supply. a high effi- ciency supply compatible with the mosfet gate drive requirements (typically 5v) can improve overall efficiency. 3. extv cc connected to an output derived boost network. the low voltage output can be boosted using a charge pump or flyback winding to greater than 4.7v. the system applicatio s i for atio wu uu will start-up using the internal linear regulator until the boosted output supply is available. external gate drive buffers the ltc1778 drivers are adequate for driving up to about 30nc into mosfet switches with rms currents of 50ma. applications with larger mosfet switches or operating at frequencies requiring greater rms currents will benefit from using external gate drive buffers such as the ltc1693. alternately, the external buffer circuit shown in figure 7 can be used. note that the bipolar devices reduce the signal swing at the mosfet gate, and benefit from an increased extv cc voltage of about 6v. figure 7. optional external gate driver q1 fmmt619 gate of m1 tg boost sw q2 fmmt720 q3 fmmt619 gate of m2 bg 1778 f07 intv cc pgnd q4 fmmt720 10 ? 10 ? soft-start and latchoff with the run/ss pin the run/ss pin provides a means to shut down the ltc1778 as well as a timer for soft-start and overcurrent latchoff. pulling the run/ss pin below 0.8v puts the ltc1778 into a low quiescent current shutdown (i q < 30 a). releasing the pin allows an internal 1.2 a current source to charge up the external timing capacitor c ss . if run/ss has been pulled all the way to ground, there is a delay before starting of about: t v a csfc delay ss ss = = () 15 12 13 . . ./ when the voltage on run/ss reaches 1.5v, the ltc1778 begins operating with a clamp on i th of approximately 0.9v. as the run/ss voltage rises to 3v, the clamp on i th is raised until its full 2.4v range is available. this takes an additional 1.3s/ f, during which the load current is folded back until the output reaches 75% of its final value. the pin can be driven from logic as shown in figure 7. diode d1
16 ltc1778/ltc1778-1 1778fb reduces the start delay while allowing c ss to charge up slowly for the soft-start function. after the controller has been started and given adequate time to charge up the output capacitor, c ss is used as a short-circuit timer. after the run/ss pin charges above 4v, if the output voltage falls below 75% of its regulated value, then a short-circuit fault is assumed. a 1.8 a cur- rent then begins discharging c ss . if the fault condition persists until the run/ss pin drops to 3.5v, then the con- troller turns off both power mosfets, shutting down the converter permanently. the run/ss pin must be actively pulled down to ground in order to restart operation. the overcurrent protection timer requires that the soft-start timing capacitor c ss be made large enough to guarantee that the output is in regulation by the time c ss has reached the 4v threshold. in general, this will depend upon the size of the output capacitance, output voltage and load current characteristic. a minimum soft-start capacitor can be estimated from: c ss > c out v out r sense (10 ? [f/v s]) generally 0.1 f is more than sufficient. overcurrent latchoff operation is not always needed or desired. load current is already limited during a short- circuit by the current foldback circuitry and latchoff operation can prove annoying during troubleshooting. the feature can be overridden by adding a pull-up current greater than 5 a to the run/ss pin. the additional current prevents the discharge of c ss during a fault and also shortens the soft-start period. using a resistor to v in as shown in figure 8a is simple, but slightly increases shutdown current. connecting a resistor to intv cc as shown in figure 8b eliminates the additional shutdown current, but requires a diode to isolate c ss . any pull-up network must be able to pull run/ss above the 4.2v maximum threshold of the latchoff circuit and overcome the 4 a maximum discharge current. efficiency considerations the percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. although all dissipative elements in the circuit produce losses, four main sources account for most of the losses in ltc1778 circuits: 1. dc i 2 r losses. these arise from the resistances of the mosfets, inductor and pc board traces and cause the efficiency to drop at high output currents. in continuous mode the average output current flows through l, but is chopped between the top and bottom mosfets. if the two mosfets have approximately the same r ds(on) , then the resistance of one mosfet can simply be summed with the resistances of l and the board traces to obtain the dc i 2 r loss. for example, if r ds(on) = 0.01 ? and r l = 0.005 ? , the loss will range from 15mw to 1.5w as the output current varies from 1a to 10a. 2. transition loss. this loss arises from the brief amount of time the top mosfet spends in the saturated region during switch node transitions. it depends upon the input voltage, load current, driver strength and mosfet capacitance, among other factors. the loss is significant at input voltages above 20v and can be estimated from: transition loss ? (1.7a ? ) v in 2 i out c rss f 3. intv cc current. this is the sum of the mosfet driver and control currents. this loss can be reduced by supply- ing intv cc current through the extv cc pin from a high efficiency source, such as an output derived boost net- work or alternate supply if available. 4. c in loss. the input capacitor has the difficult job of filtering the large rms input current to the regulator. it must have a very low esr to minimize the ac i 2 r loss and sufficient capacitance to prevent the rms current from causing additional upstream losses in fuses or batteries. applicatio s i for atio wu uu figure 8. run/ss pin interfacing with latchoff defeated 3.3v or 5v run/ss v in intv cc run/ss d1 (8a) (8b) d2* c ss r ss * c ss *optional to override overcurrent latchoff r ss * 1778 f08 2n7002
17 ltc1778/ltc1778-1 1778fb applicatio s i for atio wu uu other losses, including c out esr loss, schottky diode d1 conduction loss during dead time and inductor core loss generally account for less than 2% additional loss. when making adjustments to improve efficiency, the input current is the best indicator of changes in efficiency. if you make a change and the input current decreases, then the efficiency has increased. if there is no change in input current, then there is no change in efficiency. checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to ? i load (esr), where esr is the effective series resistance of c out . ? i load also begins to charge or discharge c out generating a feedback error signal used by the regulator to return v out to its steady-state value. during this recovery time, v out can be monitored for overshoot or ringing that would indicate a stability prob- lem. the i th pin external components shown in figure 9 will provide adequate compensation for most applica- tions. for a detailed explanation of switching control loop theory see application note 76. design example as a design example, take a supply with the following specifications: v in = 7v to 28v (15v nominal), v out = 2.5v 5%, i out(max) = 10a, f = 250khz. first, calculate the timing resistor with v on = v out : r v v khz pf m on = ()( )() = ? 25 0 7 250 10 142 . . . and choose the inductor for about 40% ripple current at the maximum v in : l v khz a v v h = ()()() ? ? ? ? ? ? ? = 25 250 0 4 10 1 25 28 23 . . . . selecting a standard value of 1.8 h results in a maximum ripple current of: ? = () () ? ? ? ? ? ? = i v khz h v v a l 25 250 1 8 1 25 28 51 . . . . next, choose the synchronous mosfet switch. choosing a si4874 (r ds(on) = 0.0083 ? (nom) 0.010 ? (max), ja = 40 c/w) yields a nominal sense voltage of: v sns(nom) = (10a)(1.3)(0.0083 ? ) = 108mv tying v rng to 1.1v will set the current sense voltage range for a nominal value of 110mv with current limit occurring at 146mv. to check if the current limit is acceptable, assume a junction temperature of about 80 c above a 70 c ambient with 150 c = 1.5: i mv aa limit () ? () + () = 146 15 0010 1 2 51 12 .. . and double check the assumed t j in the mosfet: p vv v aw bot = ()() ? () = 28 2 5 28 12 15 0010 197 2 ? .. . t j = 70 c + (1.97w)(40 c/w) = 149 c because the top mosfet is on for such a short time, an si4884 r ds(on)(max) = 0.0165 ? , c rss = 100pf, ja = 40 c/w will be sufficient. checking its power dissipation at current limit with 100 c = 1.4: p v v a vapfkhz www top = ()() ? () + ()( )( )( )( ) =+= 25 28 12 1 4 0 0165 1 7 28 12 100 250 030 040 07 2 2 . .. . ... t j = 70 c + (0.7w)(40 c/w) = 98 c the junction temperatures will be significantly less at nominal current, but this analysis shows that careful attention to heat sinking will be necessary in this circuit.
18 ltc1778/ltc1778-1 1778fb applicatio s i for atio wu uu c in is chosen for an rms current rating of about 5a at 85 c. the output capacitors are chosen for a low esr of 0.013 ? to minimize output voltage changes due to induc- tor ripple current and load steps. the ripple voltage will be only: ? v out(ripple) = ? i l(max) (esr) = (5.1a) (0.013 ? ) = 66mv however, a 0a to 10a load step will cause an output change of up to: ? v out(step) = ? i load (esr) = (10a) (0.013 ? ) = 130mv an optional 22 f ceramic output capacitor is included to minimize the effect of esl in the output ripple. the complete circuit is shown in figure 9. pc board layout checklist when laying out a pc board follow one of the two sug- gested approaches. the simple pc board layout requires a dedicated ground plane layer. also, for higher currents, it is recommended to use a multilayer board to help with heat sinking power components. figure 9. design example: 2.5v/10a at 250khz 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 run/ss pgood v rng fcb i th sgnd i on v fb boost tg sw pgnd bg intv cc v in extv cc ltc1778 + m2 si4874 m1 si4884 l1 1.8 h d1 b340a c out1-2 180 f 4v 2 c out3 22 f 6.3v x7r c in 10 f 35v 3 v in 5v to 28v v out 2.5v 10a c ss 0.1 f c c1 500pf c c2 100pf c2 6.8nf c vcc 4.7 f c f 0.1 f c b 0.22 f r c 20k r1 14.0k r on 1.4m ? r2 30.1k r f 1 ? d b cmdsh-3 1778 f09 c in : united chemicon thcr60eihi06zt c out1-2 : cornell dubilier esre181e04b l1: sumida cep125-1r8mc-h r pg 100k r3 11k r4 39k + the ground plane layer should not have any traces and it should be as close as possible to the layer with power mosfets. place c in , c out , mosfets, d1 and inductor all in one compact area. it may help to have some components on the bottom side of the board. place ltc1778 chip with pins 9 to 16 facing the power components. keep the components connected to pins 1 to 8 close to ltc1778 (noise sensitive components). use an immediate via to connect the components to ground plane including sgnd and pgnd of ltc1778. use several bigger vias for power components. use compact plane for switch node (sw) to improve cooling of the mosfets and to keep emi down. use planes for v in and v out to maintain good voltage filtering and to keep power losses low. flood all unused areas on all layers with copper. flood- ing with copper will reduce the temperature rise of power component. you can connect the copper areas to any dc net (v in , v out , gnd or to any other dc rail in your system).
19 ltc1778/ltc1778-1 1778fb applicatio s i for atio wu uu figure 10. ltc1778 layout diagram 16 15 14 13 12 11 10 9 c c2 bold lines indicate high current paths c c1 c ss r on r c r f 1778 f10 1 2 3 4 5 6 7 8 run/ss pgood v rng fcb i th sgnd i on v fb boost tg sw pgnd bg intv cc v in extv cc c b m2 m1 d1 d b c f c vcc c out c in v in v out + + ltc1778 l r1 r2 + when laying out a printed circuit board, without a ground plane, use the following checklist to ensure proper opera- tion of the controller. these items are also illustrated in figure 10. segregate the signal and power grounds. all small signal components should return to the sgnd pin at one point which is then tied to the pgnd pin close to the source of m2. place m2 as close to the controller as possible, keeping the pgnd, bg and sw traces short. connect the input capacitor(s) c in close to the power mosfets. this capacitor carries the mosfet ac current. keep the high dv/dt sw, boost and tg nodes away from sensitive small-signal nodes. connect the intv cc decoupling capacitor c vcc closely to the intv cc and pgnd pins. connect the top driver boost capacitor c b closely to the boost and sw pins. connect the v in pin decoupling capacitor c f closely to the v in and pgnd pins.
20 ltc1778/ltc1778-1 1778fb 1.5v/10a at 300khz from 3.3v input typical applicatio s u 1.2v/6a at 300khz 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 run/ss pgood v rng fcb i th sgnd i on v fb boost tg sw pgnd bg intv cc v in extv cc ltc1778 + m2 irf7811a m1 irf7811a l1, 0.68 h d1 b320b c out 270 f 2v 2 c in1-2 22 f 6.3v 2 + c in3 330 f 6.3v v in 3.3v v out 1.5v 10a c ss 0.1 f c c1 680pf c c2 100pf c vcc 4.7 f c b 0.22 f r c 20k r1 10k r on 576k r2 8.87k d b cmdsh-3 1778 ta01 c in1-2 : murata grm42-2x5r226k6.3 c out : cornell dubilier esre271m02b r pg 100k r r1 11k r r2 39k 5v 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 run/ss pgood v rng fcb i th sgnd i on v fb boost tg sw pgnd bg intv cc v in extv cc ltc1778 + m2 1/2 fds6982s m1 1/2 fds6982s l1 1.8 h c out1 180 f 2v c out2 10 f 6.3v c in 10 f 25v 2 v in 5v to 25v v out 1.2v 6a c ss 0.1 f c c1 470pf c2 2200pf c c2 100pf c vcc 4.7 f c f 0.1 f c b 0.22 f r c 20k r1 20k r on 510k r2 10k d b cmdsh-3 1778 ta02 c in : taiyo yuden tmk432bj106mm c out1 : cornell dubilier esrd181m02b c out2 : taiyo yuden jmk316bj106ml l1: toko 919as-1r8n r pg 100k r f 1 ?
21 ltc1778/ltc1778-1 1778fb typical applicatio s u 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 run/ss v on v rng fcb i th sgnd i on v fb boost tg sw pgnd bg intv cc v in extv cc ltc1778-1 + m2 irf7811a m3 si4888 d1 b340a d2 ir 12cwq03fn m1 irf7811a l1 4.8 h c out 100 f 20v 6 c in 22 f 50v 2 v in 6v to 18v v out 12v c ss 0.1 f c c1 1nf c 1 100pf c c2 220pf c vcc 4.7 f c f 0.1 f c in : marcon ther70eih226zt c out : avx tpsv107m020r0085 l1: schott 36835-1 pgnd c b 0.22 f r c 47k r1 10k 1% r on2 1.5m 1% r on1 1.5m 1% r2 140k 1% r f 1 ? d b cmdsh-3 1778 ta04 v in 18v 12v 6v i out 6a 5a 3.3a single inductor, positive output buck/boost 12v/5a at 300khz 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 run/ss v on v rng fcb i th sgnd i on v fb boost tg sw pgnd bg intv cc v in extv cc ltc1778-1 + m2 m1 l1 10 h c out 220 f 16v c in 22 f 50v v in 14v to 28v v out 12v 5a c ss 0.1 f c c1 2.2nf c c2 100pf c2 2200pf c vcc 4.7 f c f 0.1 f c b 0.22 f r c 20k r1 10k r on 1.6m r2 140k r f 1 ? d b cmdsh-3 d1 1778 ta05 united chemicon thcr70e1h226zt (847) 696-2000 sanyo 16sv220m (619) 661-6835 sumida cdrh127-100 (847) 956-0667 fairchild fds6680a (408) 822-2126 diodes, inc. b340a (805) 446-4800 c in : c out : l1: m1, m2: d1: +
22 ltc1778/ltc1778-1 1778fb typical applicatio s u positive-to-negative converter, 5v/5a at 300khz 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 run/ss v on v rng fcb i th sgnd i on v fb boost tg sw pgnd bg intv cc v in extv cc ltc1778-1 + m2 irf7822 d1 b340a m1 irf7811a l1 2.7 h c out 100 f 6v 3 c in1 10 f 25v 2 c in2 10 f 35v v in 5v to 20v v out ?v c ss 0.1 f c c1 4700pf c c2 100pf c vcc 4.7 f c f 0.1 f c b 0.22 f r c 10k r1 10k r on 698k r2 52.3k rf 1 ? d b cmdsh-3 1778 ta06 c in1 : taiyo yuden tmk432bj106mm c in2 : sanyo 35cv10gx c out : panasonic eefud0j101r l1: panasonic etqpaf2r7h v in 20v 10v 5v i out 8a 6.7a 5a
23 ltc1778/ltc1778-1 1778fb u package descriptio gn package 16-lead plastic ssop (narrow 0.150) (ltc dwg # 05-08-1641) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. gn16 (ssop) 0204 12 3 4 5 6 7 8 .229 ?.244 (5.817 ?6.198) .150 ?.157** (3.810 ?3.988) 16 15 14 13 .189 ?.196* (4.801 ?4.978) 12 11 10 9 .016 ?.050 (0.406 ?1.270) .015 .004 (0.38 0.10) 45 0 ?8 typ .007 ?.0098 (0.178 ?0.249) .0532 ?.0688 (1.35 ?1.75) .008 ?.012 (0.203 ?0.305) typ .004 ?.0098 (0.102 ?0.249) .0250 (0.635) bsc .009 (0.229) ref .254 min recommended solder pad layout .150 ?.165 .0250 bsc .0165 .0015 .045 .005 *dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side **dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side inches (millimeters) note: 1. controlling dimension: inches 2. dimensions are in 3. drawing not to scale
24 ltc1778/ltc1778-1 1778fb part number description comments ltc1622 550khz step-down controller 8-pin msop; synchronizable; soft-start; current mode ltc1625/ltc1775 no r sense current mode synchronous step-down controller 97% efficiency; no sense resistor; 16-pin ssop ltc1628-pg dual, 2-phase synchronous step-down controller power good output; minimum input/output capacitors; 3.5v v in 36v ltc1628-sync dual, 2-phase synchronous step-down controller synchronizable 150khz to 300khz ltc1709-7 high efficiency, 2-phase synchronous step-down controller up to 42a output; 0.925v v out 2v with 5-bit vid ltc1709-8 high efficiency, 2-phase synchronous step-down controller up to 42a output; vrm 8.4; 1.3v v out 3.5v ltc1735 high efficiency, synchronous step-down controller burst mode operation; 16-pin narrow ssop; 3.5v v in 36v ltc1736 high efficiency, synchronous step-down controller with 5-bit vid mobile vid; 0.925v v out 2v; 3.5v v in 36v ltc1772 sot-23 step-down controller current mode; 550khz; very small solution size ltc1773 synchronous step-down controller up to 95% efficiency, 550khz, 2.65v v in 8.5v, 0.8v v out v in , synchronizable to 750khz ltc1876 2-phase, dual synchronous step-down controller with 3.5v v in 36v, power good output, 300khz operation step-up regulator ltc3713 low v in high current synchronous step-down controller 1.5v v in 36v, 0.8v v out (0.9)v in , i out up to 20a ltc3778 low v out , no r sense synchronous step-down controller 0.6v v out (0.9)v in , 4v v in 36v, i out up to 20a lt 3800 60v synchronous step-down controller current mode, output slew rate control burst mode is a registered trademark of linear technology corporation. ? linear technology corporation 2001 lt/lt 0405 rev b ?printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com related parts u typical applicatio typical application 2.5v/3a at 1.4mhz 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 run/ss pgood v rng fcb i th sgnd i on v fb boost tg sw pgnd bg intv cc v in extv cc ltc1778 + m2 1/2 si9802 m1 1/2 si9802 l1, 1 h c out 120 f 4v c in 10 f 25v v in 9v to 18v v out 2.5v 3a c ss 0.1 f c c1 470pf c c2 100pf c2 2200pf c vcc 4.7 f c f 0.1 f c b 0.22 f r c 33k r1 11.5k r on 220k r2 24.9k rf 1 ? d b cmdsh-3 1778 ta03 c in : taiyo yuden tmk432bj106mm c out : cornell dubilier esrd121m04b l1: toko a921cy-1r0m r pg 100k

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